駕駛虛擬接口信號的bitslice我試圖創建一個任務是負責設置有點向量的和一個時鐘週期之後將其清除。我的驅動程序代碼下面附:通過任務
class my_if_driver extends uvm_driver;
`uvm_component_utils(my_if_driver)
// Members
// UVM stuff
virtual my_if_interface vif;
function new(string name="my_if_driver", uvm_component parent);
super.new(name, parent);
endfunction
extern function void build_phase(uvm_phase phase);
extern function void connect_phase(uvm_phase phase);
extern task run_phase(uvm_phase phase);
extern task drive_my_if(my_if_transaction txn);
extern task set_then_clear(ref logic signal);
endclass
function void my_if_driver::build_phase(uvm_phase phase);
endfunction
function void my_if_driver::connect_phase(uvm_phase phase);
endfunction
task my_if_driver::run_phase(uvm_phase phase);
@(posedge vif.resetn);
forever begin
seq_item_port.get_next_item(req);
fork
drive_my_if(req);
join_none
seq_item_port.item_done(req);
end
endtask
// NOTE: each 'command-signal' has bit for each tid (transaction ID)
task my_if_driver::drive_my_if(my_if_transaction txn);
// Wait for delay
repeat (txn.cycle_delay) @(posedge vif.clk);
// Then drive appropriate signal
if (txn.my_if_cmd == my_if_transaction::CMDA) begin
set_then_clear(vif.my_if_cmd_a[txn.tid]);
end
else if (txn.my_if_cmd == my_if_transaction::CMDB) begin
set_then_clear(vif.my_if_cmd_b[txn.tid]);
end
else if (txn.my_if_cmd == my_if_transaction::CMDC) begin
set_then_clear(vif.my_if_cmd_c[txn.tid]);
end
endtask
task my_if_driver::set_then_clear(ref logic signal);
signal <= 1'b1;
@(posedge vif.clk);
signal <= 1'b0;
endtask
我收到以下錯誤(奎斯塔10.6):
** Error: path_to_driver.svh(53): LHS in non-blocking assignment may not be an automatic variable
** Error: path_to_driver.svh(55): LHS in non-blocking assignment may not be an automatic variable
這些點到非阻塞賦值在set_then_clear任務「信號」。有沒有辦法通過ref參數指向虛擬接口的位圖?
嘗試在這兩條線改變到阻斷非阻擋分配。我也嘗試在EDAplayground代碼,並得到了另一個錯誤「對象‘this.vif.my_if_cmd_a [txn.tid]’不能按引用傳遞。允許的對象類型包括變量,類屬性,解壓結構成員,並解壓數組元素。」 (如果這個錯誤是一個模擬器問題或SV規則我沒有檢查。) – Greg
基於Dave的答案,這是一個LRM規則(第13.5.2節)。我選擇做非阻塞的原因是因爲我希望在所有監控活動(此時不使用CB)後更新該值。 –