我想在時鐘邏輯中創建3個信號。帶3個信號的計數器
8s
7s ----- create working signal
6s
5s
4s
3s
2s
1s ----- create timeout signal
0s ----- create finish signal
always @(posedge CLK_1K or posedge signal_count) begin
slot_count = 0;
data_finish = 0;
timeout = 0;
working = 0;
if (signal_count) begin
slot_count <= 1;
counter <= 8;
end else if (counter > 0) begin
counter = counter - 1;
if (counter == 7) begin
working = 1;
end else if (counter == 1) begin
timeout = 1;
end else if(counter == 0) begin
data_finish = 1;
end
end
end
什麼做了:
- 在模擬試驗是正常的。
- 下載到設備正常工作...
我下一步該做什麼?謝謝....
你能更具體嗎?你的代碼是在模擬中工作,而不是在設備上工作?還是你收到綜合錯誤? –